Research Institute · Programme

Further results

Subspace packing lemmas, additive energy bounds, and exact gate counts for polynomial multipliers and carry transducers.

Published 2026-08-29 · updated 2026-09-04

4results
0machine-checked
2negative results
0open cells

The programme

Where things stand

What this programme is about

This programme asks how many non-linear multiplication gates an arithmetic or cryptographic circuit strictly requires when linear XOR operations are free. Non-linear multiplications drive up silicon area in hardware and dominate proving time in zero-knowledge systems. Anyone building an integer multiplier, an adder, or an elliptic curve co-processor needs to know the exact floor of multiplications required, so they don't waste engineering effort chasing impossible circuit reductions.

The programme tracks structural lower bounds that bypass SAT solvers, tests proposed algebraic formulas against concrete circuits, and charts the boundaries where current analytical techniques stall. A result here gives circuit designers hard performance floors and warns mathematicians away from flawed proof routes.

What has been settled

On analytical lower bounds, MF-137 proves the packing lemma bound MC(F) ≥ dim(V) + μ(V) - 1, where V is the nonlinear output span modulo affine functions and μ(V) is the minimum gate cost of any nonzero scalar class in V. This provides a solver-free lower bound on multiplicative complexity. The register records no corrections and states no prior-art position. Applying spectral and algebraic techniques, MF-153 proves solver-free lower bounds for multiplication and addition circuits, showing MC(3×3) ≥ 6, MC(4×4) ≥ 9, MC(clmul_4) ≥ 8, MC(clmul_5) ≥ 11, and MC(Add(4,5)) ≥ 8 via degree and Walsh floor methods. The register notes no corrections, and credits prior art as known and internal, citing Schnorr for degree floors and MF-135 for Walsh floors.

On complexity conjectures, MF-143 refutes three proposed complexity laws by providing exact counterexamples. It settles MC(11 x mod 128) = 6 ≠ 5 for odd constant multipliers, kappa_sq(7) ∈ {2,3} ≠ 1 for square catalyst overhead, and MC(I_9) = 6 ≠ 5 for odd modular reciprocals. The register lists no corrections and states no prior-art position.

On proof barriers, MF-106 settles the 37-wall atlas across walls W01–W37 supported by receipts R1–R46. The register notes an explicit correction: the atlas documents scoped negative knowledge without claiming a universal impossibility theorem, preserving each wall's MODEL, TECHNIQUE, SCOPE, or EVIDENCE label. The register makes no priority, novelty, or world-first claim, noting that a prior-art sweep has not run on the atlas.

What is still open

Two main gaps remain unresolved across these entries. Under MF-143, the square catalyst overhead for 7 is pinned to kappa_sq(7) ∈ {2,3}. The refutation settles kappa_sq(7) ≠ 1, yet existing receipts leave the choice between 2 and 3 open.

Under MF-106, the Wall Atlas explicitly identifies five theoretical mechanisms that current proof techniques cannot yet resolve. These open topics comprise nonadditive floors, shared catalysts, anticipatory cancellation, p14 charging, and record-interface mismatch. For each of these, receipts R1–R46 delimit what current proof techniques and circuit models forbid, while leaving the underlying circuit complexities uncalculated.

How to read the evidence

Receipts dominate this programme. Written proofs establish the theoretical packing and spectral bounds. Because every claim traces to an audited paper proof or concrete computational receipt without reliance on informal heuristics, readers can trust these bounds and wall limits completely within their stated scopes.

Showcase

The strongest results here

MF-137RECEIPTED

The packing lemma lower bound for multiplicative complexity

MC(F) ≥ dim(V) + μ(V) - 1, where V is nonlinear output span mod affine and μ(V) is min gate cost of any nonzero scalar class in V

A solver-free lower bound shows that the multiplicative complexity of a function is at least the dimension of its nonlinear output span modulo affine functions plus the minimum gate cost in that span minus one.

lower boundFurther resultsfull paper

Published 2026-09-04

Every entry

The rest of the programme

Every confirmed result in this programme. Each links to its full paper.

Snapshot 2026-09-06. Generated from the division's registers and curation records; never hand-edited.