Research · Papers · Further results · MF-106
The 37-wall atlas of failed proof routes and scope limits
W01–W37: MODEL, TECHNIQUE, SCOPE, and EVIDENCE walls with receipts R1–R46
Published 2026-08-29
For everyone
Plain summary
When engineers try to simplify digital circuits or prove that a circuit cannot be made smaller, many standard mathematical approaches hit hard walls. Instead of discarding these failed attempts, the Wall Atlas documents 37 verified dead ends in exact circuit synthesis. It splits them into four buckets: broken cost models, proof methods that hit mathematical limits, rules that fail to transfer across different circuit families, and solver results that lack complete verification logs.
The atlas tracks barriers like shared catalysts, nonadditive floors, and anticipatory cancellation. It maps out specific localized dead ends rather than claiming circuit optimization is impossible overall. This release makes no priority or novelty claims, and includes no external prior-art survey.
Result
The Wall Atlas categorizes 37 verified obstructions (W01–W37) across four failure classes:
- MODEL: structural defects in the underlying circuit cost formulation.
- TECHNIQUE: provable performance ceilings of specific proof strategies.
- SCOPE: domain boundaries where transfer theorems or reductions fail.
- EVIDENCE: gaps in verification certificates or solver replay logs.
Across receipt ledger entries R1–R46, the atlas bounds nonadditive floors, shared catalysts, anticipatory cancellation, p14 charging, and record-interface mismatches.
Setting and definitions
The evaluation domain is exact logic synthesis under the GF(2) XOR-free XAG multiplicative complexity model.
Negative results are partitioned into four classes:
- MODEL wall: the cost model or interface definition fails to reflect actual circuit execution.
- TECHNIQUE wall: a proof strategy provably cannot tighten a lower bound further.
- SCOPE wall: a valid theorem fails across distinct function families or decomposition interfaces.
- EVIDENCE wall: empirical solver runs or verification scripts omit complete proof certificates.
Walls are tagged with verification tiers P (preliminary), FC (fully certified), or FR (fully replayed).
Method
Obstructions W01–W37 were established through symbolic proofs and exhaustive solver replays. Artifact execution scripts in the project reports verified the load-bearing walls.
Verification receipt: zkgolf-decomp/synth-j-scratch/replay_load_bearing_walls.receipt.json (SHA-256: 038cd799ef6502abade1dea46e76cae0462e34b0495fcd070c29cf60b7a1ded6). Analysis documents: zkgolf-decomp/reports/WALL-ATLAS.md and zkgolf-decomp/SD-RESEARCH-UPDATE-REPORT.md.
Discussion
The 37-wall atlas maps scoped negative results rather than establishing a universal impossibility theorem. Each wall carries its MODEL, TECHNIQUE, SCOPE, or EVIDENCE classification and restricts only its specific proof path or transfer claim.
The atlas isolates key structural phenomena:
- Nonadditive floors and shared catalysts that break sub-additive lower-bound summation.
- Anticipatory cancellation that bypasses greedy synthesis steps.
- p14 charging and record-interface mismatches that break modular circuit composition.
The atlas prevents researchers from reusing dead-end lower-bound techniques and flawed transfer proofs. It asserts no novelty or priority claims, and includes no prior-art sweep.
For everyone — the takeaway
What this means
Knowing what fails saves time. In circuit design, researchers often waste time trying to force a proof technique into a problem where it cannot work.
The atlas acts as a map of known dead ends. By separating flawed models from the limits of specific proof tools, it shows where current tools break down and points toward the open paths that remain.
Register references
- Entry ID: MF-106
- Reports:
zkgolf-decomp/reports/WALL-ATLAS.md - Reports:
zkgolf-decomp/SD-RESEARCH-UPDATE-REPORT.md - Receipt Ledger: R1–R46
- Execution Receipt:
zkgolf-decomp/synth-j-scratch/replay_load_bearing_walls.receipt.json(SHA-256:038cd799ef6502abade1dea46e76cae0462e34b0495fcd070c29cf60b7a1ded6)
Every artifact named above is bundled in, or hashed by, this paper's evidence pack below.
Evidence pack
Everything needed to check this entry against its receipts: the register text, a manifest with a SHA-256 hash for every named receipt, and 2 of 3 receipt files bundled (35 KB). Anything not bundled is still hashed in the manifest and lives in the compute-box working trees.
Changelog
Last reviewed 2026-08-29
- 2026-08-29Published on this site.