Research · Papers · Adders, counters and the heap law · ML-089

Resolution tax τ_4 in its smallest open form

τ_4 = MC(K_4) − MC(J_5) ∈ {1,2}; MC(K_4) = 9, MC(J_5) ∈ [7,8]

ML-089OPENOPEN QUESTIONAdders, counters and the heap law

Published 2026-09-04

For everyone

Plain summary

Multiplicative complexity counts the minimum number of nonlinear AND gates needed to build a circuit when linear XOR gates are free. The resolution tax, τ_4 = MC(K_4) − MC(J_5), measures the difference in AND gate count between two structured function families, K_4 and J_5.

K_4 requires exactly 9 AND gates. J_5 needs either 7 or 8, which fixes τ_4 to either 1 or 2. Determining whether J_5 can run on 7 gates is the smallest open case of this problem. Current automated solvers cannot find a 7-gate circuit or prove that none exists, timing out across every tested search method.

Result

The resolution tax τ_4 satisfies:

τ_4 = MC(K_4) − MC(J_5) ∈ {1, 2}

This range follows from:

  1. MC(K_4) = 9 (exact, reference MF-181).
  2. MC(J_5) ∈ [7, 8].

Deciding whether MC(J_5) = 7 for the 16-input, 5-output map remains open, defining a solver wall in the 13-wire, 7-gate synthesis class.

Setting and definitions

Circuits are evaluated in the XOR-free multiplicative complexity model GF(2) XAG, where linear XOR operations cost zero and nonlinear AND gates cost 1.

  • MC(f) is the multiplicative complexity of a multi-output Boolean function f over GF(2).
  • K_4 and J_5 are multi-output Boolean function families; J_5 maps 16 input bits to 5 output bits.
  • The resolution tax is τ_4 = MC(K_4) − MC(J_5).
  • deg(f) is the algebraic degree of f. For the outputs of J_5, deg(J_5 outputs) ≤ 8.
  • Target parameter p denotes the candidate number of multiplicative gates in the synthesis search (p = 7 for J_5).

Method

Bounds on MC(J_5) and τ_4 were tested using automated synthesis across several solver gauges:

  • Monolithic synthesis via tile_synth.
  • Gate-0 selector cubing.
  • Shadow pins.
  • RREF factor-pair gauge encodings.
  • Impurity cube formulations (calibrated on J_4 at p = 5, yielding no speedup).
  • Row restriction encodings (which increased runtime on UNSAT instances).

Equivalent formulations were also evaluated:

  • Scalar TOP_4 at p = 5.
  • F_5 = 7 exact + E1.
  • Sum-of-dots columns at p = 5.
  • Binary fork columns at p = 5.

All runs timed out between 3,600 and 7,200 seconds per cell across both tested gauges. Algebraic degree bounds cannot resolve the instance: deg(J_5 outputs) ≤ 8 = p + 1 at p = 7, leaving the missing gate undetectable by degree-based lower bounds.

Discussion

The resolution tax τ_4 remains open due to an explicit solver wall. Synthesizing J_5 at p = 7 requires searching a 13-wire, 7-gate space for a 16-input, 5-output system.

Neither direct SAT synthesis nor algebraic degree bounding determines whether MC(J_5) is 7 or 8. Degree arguments cannot force a lower bound of 8 because the maximum output degree of 8 does not exceed 2^(p - 4) or the p + 1 gate threshold at p = 7. Pruning techniques, including impurity cubing and row restriction, failed to deliver tractability or an UNSAT certificate. The problem status remains OPEN.

For everyone — the takeaway

What this means

Multiplicative complexity sets the efficiency and cost of zero-knowledge proofs, masked hardware, and lightweight ciphers. The parameter τ_4 is the smallest unknown gap between these two fundamental function families. Because SAT solvers time out and standard degree bounds cannot distinguish between 7 and 8 gates, closing this gap requires new structural pruning rules or stronger circuit lower bounds.

Register references

  • Register entry: ML-089 (2026-09-03)
  • Cross-reference: MF-181 (for MC(K_4) = 9)
  • Receipt artifacts: ZKGOLF-COUNCIL4-DIGEST-2026-09-02.md, RECORD-RREF-SYNTH.log, RECORD-COUNCIL4-FIVECENT.log

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Changelog

Last reviewed 2026-09-04

  • 2026-09-04Published on this site.

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